The present invention relates to the field of electronic circuits, and, more particularly, to methods for forming electronic circuits on dielectric layers.
Radio frequency (RF) integrated circuits (ICs) and devices, such as inductors and capacitors, are well known for use in telecommunications applications. Many such devices and circuits are now being formed using thin dielectric layers or xe2x80x9cmembranesxe2x80x9d made out of materials such as silicon nitride (SiN), for example. Such membranes have been found to improve the electrical characteristics of RF circuits mounted thereon. These membranes are typically formed on a substrate of suitable material, and the RF circuit is thereafter formed on the membrane which supports the RF circuit. The substrate provides support for the membrane during the patterning. Yet, capacitive coupling may occur between the substrate and the RF component, leading to device performance degradation.
To overcome this limitation, the RF component may be separated from the substrate. Prior art methods for removing the RF component from the substrate typically require etching a window through an opposite side of the substrate to release the membrane. This so-called xe2x80x9cbacksidexe2x80x9d etching may include using hot potassium hydroxide (KOH) to etch a silicon substrate, for example, where the dielectric layer acts as an etch stop layer. One difficulty with backside etching is that it requires careful double-sided alignment to make sure that the etched area corresponds with the membrane. Furthermore, due to the corrosiveness of the KOH, any exposed portions of the substrate must be protected from the etchant, e.g., by using a mask. Having to deposit and remove such a mask requires additional processing time and costs. Also, the etch rate of KOH is about 100 Am per hour. As a result, typical etch times for an eight inch wafer, for example, may be seven hours or greater.
A prior art technique which addresses some of the difficulties associated with backside etching is disclosed in U.S. Pat. No. 5,853,601 to Krishaswamy et al. entitled xe2x80x9cTop-Via Etch Technique for Forming Dielectric Membranes.xe2x80x9d The patent is directed to methods for forming film bulk acoustic resonators (FBAR). The structure of an FBAR includes a substrate having a cavity on a surface thereof, a membrane on the substrate extending over the surface cavity, a first electrode on the membrane, a piezoelectric layer on the first membrane, and a second electrode layer on the piezoelectric layer. The method disclosed in the patent includes forming vias or openings through the membrane layer and isotropically etching the substrate through the vias using a dry etch process including an SF6 gas. While this method does address the difficulty of backside alignment, it does not teach how to release the RF component from the substrate. Furthermore, the etching process disclosed in the patent still requires a relatively long etch time due to the nature of the reactive ion etchant. Such an etchant may also damage delicate circuit components of RF circuits like those described above.
In view of the foregoing background, it is therefore an object of the invention to provide a method for making a radio frequency (RF) component on a dielectric layer which alleviates the above noted problems associated with the prior art.
This and other objects, features, and advantages in accordance with the present invention are provided by a method for making an RF component including forming a dielectric layer on a semiconductor substrate and forming and patterning a conductive layer on the dielectric layer to define the RF component. The dielectric layer may include SiN, the conductive layer may include aluminum, and the semiconductor substrate may include silicon, for example. At least one opening may be formed through the RF component at least to the semiconductor substrate. Moreover, the at least one opening may either extend into the semiconductor substrate or substantially terminate at a surface of the semiconductor substrate. The RF component may then be released from the semiconductor substrate by exposing the semiconductor substrate to an etchant passing through the at least one opening to the semiconductor substrate.
Releasing the RF component may include exposing the semiconductor substrate to a dry etchant, such as XeF2, for example. The at least one opening may have a diameter in a range of about 0.5 to 20 xcexcm. Also, forming the at least one opening may include forming a plurality of openings laterally adjacent to portions of the conductive layer with no openings extending through the conductive layer. The plurality of openings may be formed in a predetermined pattern having substantially uniform spacing between adjacent openings, where the substantially uniform spacing is in a range of about 20 to about 200 xcexcm, for example.
An RF component according to the invention is also provided. The RF component may include a dielectric layer having opposing first and second major surfaces, the first surface being free from a semiconductor substrate, the dielectric layer having a plurality of openings extending between the first and second opposing major surfaces. The RF component may also include a patterned conductive layer on the second major surface of the dielectric layer.